ECE 271
(3 credits)
Digital Logic Design
Fall 2013
Calendar Assignments Resources Course Policies
Announcements:
Lecture  Section 1: ILLC (INTO Building) 155 MWF 10:00  10:50  
Lab Information  ECE 272 does not have any grading connection to ECE 271.  
Instructor 
Matt Shuman 
Office Hours in KEC
1115 Wednesday 11:00  13:00 Thursday 13:00  14:30 other days & times by appointment 

Lab TAs 
Office Hours in KEC
1119 TBD 

Prerequisites  MTH 231 (concurrent enrollment acceptable)  
Textbooks  Required: Harris, David Money & Harris, Sarah L., Digital Design and Computer Architecture, 2nd Edition, Morgan Kaufmann. ISBN: 9780123944255 

Course Learning Objectives 
2. Analyze and design combinational systems using standard gates and minimization methods (such as Karnaugh maps). (ABET Outcomes: a, c, n) 3. Analyze and design combinational systems composed of standard combinational modules, such as multiplexers and decoders. (ABET Outcomes: a, c, n) 4. Analyze and design simple synchronous sequential systems. (ABET Outcomes: a, c, n) 5. Analyze and design sequential systems composed of standard sequential modules, such as counters and registers. (ABET Outcomes: a, c, n) 6. Analyze and design simple systems composed of programmable logic, such as ROMs and PLAs. (ABET Outcomes: a, c, n) 7. Perform basic arithmetic operations with signed integers represented in binary. (ABET Outcomes: a, m, n) 

Academic Honesty Policy  See the university,
college,
department,
and course policies. Obviously, compliance is expected. 

Calendar  Check here every week; the schedule is subject to "adjustments"  
Grades 
Final grades are based on the accumulated percentage. See the evaluation criteria and grading scale. 