ECE 418/518: Semiconductor Processing, Spring 2006
|
PROJECT (out May 1, 2006) |
LAB GUIDE (coming by week 5) |
GRADES |
Welcome to the ECE 418/518 Semiconductor Processing web site. This site contains information and downloadable materials for the class and laboratory that you will need during the course.
Instructor: Thomas K. (Tom) Plant [tkp], Office: KEC 3123; Phone: 737-2984; E-mail: tkp@eecs.orst.edu, Office Hours: MW 8-9, MWF 3-4 or by e-mail appointment
Class TAs: Eric Sundholm: Office: E-mail: sundholm@eecs.oregonstate.edu Office Hours: E-mail to set up appointment and TBA
Linda Englebrecht: Office: E-mail: lemums@yahoo.com Office Hours: E-mail to set up appointment and TBA
Class Meeting Times: MWF 10-1050, Location: Covell 218 (First 5 weeks)
F 10-1050 only for last 5 weeks – also in Covell 218
Textbook: “Introduction
to Microelectronics Fabrication, 2nd Edn.”
Purdue Modular Series on
Author: Richard Jaeger (Prentice-Hall Publishing, 2002)
Labs: MW 9-11; 10-12; 11-1 [All labs meet in Owen 433 clean room. 4 students / 2-hr lab section.]
TuTh 1-3; 2-4; 3-5
Lab Assignments:
Lab 1 – Fabricate and measure MOS
capacitors (Weeks 6 and 7a)
Lab 2 – Fabricate and measure a PN diode, a
linear resistor, and 3 sizes of NMOS transistors. Also measure contact resistance (Weeks 7b -10)
Reading Assignments:
Week 1 Chapters 1 and 3 –
Fabrication overview and oxidation Overview: Oxidation
Week 2 Chapter 2 and SUPREM tutorial –
Photolithography, oxide etch, and process modeling Crystal
Growth Lithography
Week 3 Chapters 4 and 5 –
Diffusion and ion implantation Diffusion Implantation
Week 4 Chapters 6 (7 and 8 lightly)
– Thin-film deposition, interconnects, and packaging Deposition
Week 5 Chapter 9 – MOS process
integration Process Integration
Week 6 Lab #1: MOS capacitor –
oxidation;
metallization
Week 7 Lab #1: measure; Lab #2 NMOS transistors – field oxide
Week 8 Lab
#2: photolithography (PL) and
n-diffusion window etch; P (n-type) diffusion
Week 9 Lab #2: PL, contact window etch,
Al contact evaporation; PL and Al contact etch to complete wafer fab
Week 10 Lab #2: Measure contact resistance, PN junction, resistor; measure 3 NMOS transistors and compare
Homework Assignments:
Homework Assignment #1: Ch 1: 14,15; Ch
2: 1,3,4; Ch 3: 7,8,17 Due: Friday, April 21, 2006 Homework #1
Solutions
Homework Assignment #2: Ch 4:
1,2,10; Ch 5: 1; Ch 6: 3,9 Due: Friday, May 5, 2006 Homework #2
Solutions
SUPREM Project (May 1, 2006) Due June 9, 2006
Useful links for class materials
Stanford University Processing Lab
Some Semiconductor Companies
in
http://www.wafertech.com/index.htm
Page last modified by T.K. Plant:
June 29, 2006