ECE 418/518: Semiconductor
Processing, Spring 2008 (updated)
|
PROJECT (out May 2, 2008) |
LAB GUIDE (coming by week 4) |
GRADES |
Welcome to the ECE 418/518 Semiconductor Processing web site. This site contains information and downloadable materials for the class and laboratory that you will need during the course.
Instructor: Thomas K. (Tom) Plant [tkp], Office: KEC 3123; Phone: 737-2984; E-mail: tkp@eecs.orst.edu, Office Hours: F 10-12 or by e-mail appointment
Class TAs: Eric Sundholm: Office: Owen 417 E-mail: sundholm@eecs.oregonstate.edu Office Hours: E-mail to set up appointment and TBA
Ira Jewell: E-mail: Office Hours: E-mail to set up appointment
Class Meeting Times: MW 9-950, Location: Covell 218 (First 4 weeks)
F 8-950 Location: Covell 218 and/or computer lab (All 10 weeks) Lectures or lab discussions or SUPREM modeling
Textbook: “Introduction
to Microelectronics Fabrication, 2nd Edn.”
Purdue Modular Series on
Author: Richard Jaeger (Prentice-Hall Publishing, 2002)
Labs: MW 9-11; 10-12; 11-1 (may be some changes) [All labs meet in Owen 433 clean room. 4 students / 2-hr lab section.]
TuTh 1-3; 2-4; 3-5 (may be some changes) Lab Roster with who is in each lab section and possible extended times available
Lab Assignments:
Lab 1 – Fabricate and measure MOS
capacitors (Week 5 and first half of
week 6)
Lab 2 – Fabricate and measure a PN diode, a linear
resistor, and 3 sizes of NMOS transistors.
Also measure contact resistance
(Weeks 6.5 -10)
Reading Assignments:
Week 1 Chapters 1 and 3 –
Fabrication overview, crystal growth and oxidation Overview
Week 2 Chapters 2 and 4 – Photolithography, oxide etch, diffusion Lithography Oxide etch Diffusion
Week 3 Chapters 5 and 6; SUPREM
tutorial – Ion
implantation, thin-film deposition,
SUPREM tutorial Implantation Deposition SUPREM
intro
Week 4 Chapters (7 and 8 lightly) and
9 – Interconnects, packaging, MOS process integration Interconnects Packaging Process integration
Lab weekly tasks:
Week 5 Lab
#1: MOS capacitor –
oxidation; metallization MOS capacitor process flow 2007
Week 6 Lab #1: measure capacitors and
oxide properties
MOS capacitor lab report due Friday, May 9, 2008
Week 7 Lab #2 NMOS transistors – field oxide NMOS transistor process flow 2007
Week 8 Lab
#2: photolithography (PL) and
n-diffusion window etch; P (n-type) diffusion
Week 9 Lab #2: PL, contact window etch,
Al contact evaporation; PL and Al contact etch to complete wafer fab
Week 10 Lab
#2: Measure contact resistance, PN
junction, resistor; measure 3 NMOS
transistors and compare
NMOS transistor lab report due Friday, June
6, 2008 or sooner
Homework Assignments:
Homework Assignment #1: Due: Monday, April 14, 2008 Homework #1 Solutions
Homework
Assignment #2: Due: Friday, April 25, 2008 Homework #2 Solutions
SUPREM Project (May 2, 2008) Due June 6, 2008
Term Project: [For ECE 518
students]
Any students taking the class for ECE 518
credit are required to do a term project consisting of an oral Power Point
presentation on a current processing topic.
Oral presentations will be made during the
Friday class in the last 2 weeks.
Please let Dr. Plant know which you plan to do by Friday, April 25, 2008
and one
or two possible topics you would like to
research. Details can be found at Term
Project
Midterm Exams:
MT #1: Friday, May 2, 2008 (over lecture material Weeks 1-4)
MT #2: Tuesday,
June 6, 2008 12-2 at scheduled “Final Exam” time (over lab processing mainly)
Useful links for class materials
Stanford University Processing Lab
Some Semiconductor Companies
in
http://www.wafertech.com/index.htm
Page last modified by T.K. Plant:
May 29, 2008